LG 43LF5400-UB Service Manual page 24
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Also See for 43LF5400-UB:
- Safety and reference (45 pages) ,
- Owner's manual (31 pages) ,
- Service manual (29 pages)
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<SOC_RESET>
OPT
R103
470
POWER_DET_RESET
+3.3V_ST
OPT
C100
C101
4.7uF
4.7uF
10V
10V
SOC_RESET
R104
C103
470K
0.1uF
16V
<HW_OPTION>
+3.3V_NORMAL
FHD
R102
4.7K
MODEL_OPT
HD
R101
4.7K
AVDD_MOD
KEY1
KEY2
LED_RED
+1.15V_VDDC
DDR_DATA
AV_DET
DDC_SCL_1
DDC_SDA_1
COMP_DET
5V_DET_HDMI_2
MHL Disable
DDC_SDA_2
DDC_SCL_2
SUB_NVRAM_ROHM
HPD2
IC100-*1
BR24G512FJ-3
HDMI2_5V
A0
VCC
1
8
A1
WP
+1.15V_VDDC
2
7
A2
SCL
3
6
CK-_HDMI1
GND
SDA
4
5
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
EEPROM(512KB)
NVRAM_ATMEL
D1+_HDMI1
IC100
AT24C512C-SSHD-T
D2-_HDMI1
+3.3V_ST
D2+_HDMI1
A0
VCC
1
8
CK-_HDMI2
C105
0.1uF
A1
WP
R107
16V
R106
2
7
2.2K
2.2K
CK+_HDMI2
AR100
A2
SCL
33
3
6
D0-_HDMI2
1/16W
I2C_SCL
GND
SDA
D0+_HDMI2
4
5
I2C_SDA
OPT
OPT
C102
C104
8pF
8pF
SERIAL FLASH(64MB)
+3.3V_ST
IC101
OPT
W25Q64FVSSIG
R105
4.7K
CS
VCC
R100
1
8
/SPI_CS
10K
C106
0.1uF
DO[IO1]
%HOLD[IO3]
16V
2
7
SPI_SDO
/FLASH_WP
WP[IO2]
CLK
3
6
GND
DI[IO0]
4
5
Not USe Macronix (EAN63146601)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
OPT
AR105
4.7K
Closed to SoC as possible
DM_P1
125
DP_P1
126
AVDD_MOD_4
127
AR103
SAR0/GPIO75
100
128
1/16W
SAR1/GPIO74
129
SAR2/GPIO73
R111
1K
130
VDDC_3
131
VDDIO_DATA
132
GPIO54
R110
1K
133
AR102
100
DDCDD_CL
134
1/16W
DDCDD_DA
135
DDCDA_CL
R109
1K
136
DDCDA_DA
137
R108
10K
MHL_DET/GPIO86
138
R128
10K
LGE8220(MSD8220LBM)
DDCDB_DA
139
AR101 100
DDCDB_CL
140
1/16W
HOTPLUG_B
141
AVDD_5V_MHL
142
GND_EFUSE
143
VDDC_4
144
RXCN_D
145
RXCP_D
146
RX0N_D
147
RX0P_D
148
RX1N_D
149
RX1P_D
150
RX2N_D
151
RX2P_D
152
RXCN_B
153
RXCP_B
154
RX0N_B
155
RX0P_B
156
E-PAD
SPI_SCK
SPI_SDI
<Chip config.>
4.7K
1/16W
AR108
Closed to SoC as possible
R117
10K
AR107
33
1/16W
R114
10K
IC102
[M1L]
TP1
<MAIN SoC Vcc>
L102
PZ1608U121-2R0TF
+3.3V_ST
C131
C132
C121
0.1uF
0.1uF
C127
10uF
16V
16V
C139
6.3V
1uF
0.1uF
10V
16V
+1.15V_VDDC
C130
C138
0.1uF
0.1uF
C120
C129
16V
C126
10uF
16V
0.1uF
1uF
C137
6.3V
16V
0.1uF
10V
16V
DDR_CMD
+1.8V_DDR
+1.8V_DDR
L101
L104
PZ1608U121-2R0TF
PZ1608U121-2R0TF
C119
C118
0.1uF
OPT
C135
10uF
16V
C125
10uF
6.3V
0.1uF
6.3V
16V
G_ODD[3]/LVA0-/LLV1-/EPI1-
78
G_ODD[2]/LVA0+/LLV1+/EPI1+
77
G_ODD[1]/LVA1-/LLV2-/EPI0-
76
G_ODD[0]/LVA1+/LLV2+/EPI0+
75
B_ODD[7]/LVA2-/LLV3(CLK)-
74
B_ODD[6]/LVA2+/LLV3(CLK)+
73
B_ODD[5]/LVACLK-/LLV4-
72
B_ODD[4]/LVACLK+/LLV4+
71
B_ODD[3]/LVA3-/LLV5-
70
B_ODD[2]/LVA3+/LLV5+
69
B_ODD[1]/LVA4-/LLV6-
68
B_ODD[0]/LVA4+/LLV6+
67
GPIO53/I2S_OUT_SD
66
GPIO52/I2S_OUT_BCK
65
GPIO51/I2S_OUT_MCK
64
GPIO50/I2S_OUT_WS
63
GPIO49/SPDIF_OUT
62
SPDIF
R126
GPIO47
100
61
GPIO46/MHL_VBUS
60
GPIO45/I2C_SCLM/UART_RX1
59
GPIO44/I2C_SDAM/UART_TX1
58
VDDC_2
57
+1.15V_VDDC
VDDIO_CMD
56
DDR_CMD
AVDD_MOD_2
55
AVDD_MOD
XOUT
54
R127
XIN
1M
53
AVDD3P3_DMPLL
52
AVDD_DMPLL
AVDD3P3_DADC
51
AVDD_DADC
VIFM
50
R122
0
C123
0.1uF
16V
VIFP
49
R123
0
C124
0.1uF
IFAGC
16V
48
OPT
OPT
C134
LINEOUTR0
C128
47
100pF
100pF
Closed to SoC
+3.3V_NORMAL
C122
0.1uF
C116
16V
R124
0.1uF
10K
16V
C117
R125
100
10uF
6.3V
Close to MSTAR
L15_M1L
MAIN
+3.3V_ST
AVDD_MOD
L105
PZ1608U121-2R0TF
AVDD_DADC
C147
0.1uF
C140
16V
0.1uF
16V
L108
PZ1608U121-2R0TF
AVDD_AU33
C146
0.1uF
16V
L107
PZ1608U121-2R0TF
AVDD_DMPLL
C145
0.1uF
16V
L106
PZ1608U121-2R0TF
AVDD_VIDEO
DDR_DATA
C144
0.1uF
16V
C136
0.1uF
OPT
16V
C141
0.1uF
16V
Closed to Main SoC Each Pin
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
AUD_LRCH
AUD_SCK
AUD_MASTER_CLK
AUD_LRCK
SPDIF_OUT
VCOM_SDA
VCOM_SCL
TU_SCL
TU_SDA
C143
15pF
X100
24MHz
C142
15pF
Closed to SoC
IF_N_MSTAR
IF_P_MSTAR
IF_AGC_MAIN
C133
0.047uF
25V
140822
1
5
LGE Internal Use Only
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