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5.3 CN102
Pin No.
Name
1
2
EXT_SPI_WAKE UP
3
EXT_SPI_STATUS
4
EXT_SPI_CS
5
EXT_SPI_CLK
6
EXT_SPI_MOSI
7
EXT_SPI_MISO
8
9
UART_TX
10
UART_RX
5.4 CN103
Pin No.
Name
1
MIC2_BIAS
2
MIC2_N
3
MIC2_P
4
MIC1_BIAS
5
MIC1_N
6
MIC1_P
7
SPK_N
8
SPK_P
I/O
GND
-
O
I
O
O
O
I
GND
-
O
I
I/O
O
I
I
O
I
I
O
O
Description
Ground
SPI Slave wake up
Request data transaction in Slave device
SPI Slave Chip Select
SPI Clock
SPI Master Output Slave Input
SPI Master Input Slave Output
Ground
UART Communication signal line
UART Communication signal line
Description
MIC2 bias output
MIC2 negative input
MIC2 positive input
MIC1 bias output
MIC1 negative input
MIC1 positive input
Negative speaker output
Positive speaker output
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